1. Technical Field
The disclosure relates generally to power management methods and power management apparatuses and chipsets using the same, and, more particularly to power management methods for controlling processor power states in ACPI (Advanced Configuration and Power Interface) standard for controlling operations of phase lock loops (PLLs) of a computer system.
2. Background
For power saving, the ACPI (Advanced Configuration and Power Interface) standard is used in conventional computer systems, especially in portable computers such as notebooks, for efficiently monitoring and distributing power supply to each device in the computer system. Five ACPI states, such as S0, S1, S3, S4 and S5 states, are commonly utilized in computer systems. Computer systems can normally operate in the normal state (S0 state) and when a computer system is idle for a predetermined period, the computer system enters one of the sleeping states S1 to S5 that offer power-saving. In addition, multiple processor power states are further defined in state S0 of the ACPI.
FIG. 1 is a schematic diagram of an ACPI-defined processor power state. A CPU executes instructions or manipulates data while in a processor working state, i.e. full running state (C0 state). When the computer system 100 is idle for a predetermined time period, the CPU enters one of the power-saving states C1-C4 according to an operation system (OS). The OS determines which power state the CPU (i.e. the processor) should enter according to the bus master activity status of the computer system. ACPI defines a first (C1), a second (C2), a third (C3), and a fourth (C4) state. The C2 state offers improved power savings over the C1 state, the C3 state offers improved power savings over the C2 state and the C4 state offers improved power savings over the C3 state. Therefore, the C4 state is also referred to as the lowest power consumption state. In the C2 state, the CPU does not execute instructions but the CPU can snoop the bus master access to a main memory. A bus master is an element of a computer system controlling bus paths, such as a USB controller, a PCI controller and so on. The CPU returns from the C2 state to the C0 state when a break event occurs, such as an interrupt or an execution request. In the C3 or C4 state (hereinafter referred to as the C3/C4 state), the CPU does not snoop the bus master access to main memory and stops the clock. Compared with the C3 state, the CPU enters to a deeper sleeping state in the C4 state. Therefore, the C4 state is the lowest power consumption state among all CPU power saving states, i.e. the least power consumption state.
When the OS determines that the computer system is idle for a predetermined period, the CPU enters the C3/C4 state to save power of the computer system efficiently.
For a computer system, a phase lock loop (PLL) is used for generating multiple clock signals with different frequencies according to a received source clock signal input with low frequency so as to generate high clock signal output with different frequencies. Most integrated chips have integrated PLLs to generate different high-frequency clock inputs. Operation of the PLL, however, uses a lot of power. Thus, one way to lower power consumption in a computer system, is to more efficiently control the PLL.
Conventionally, PLL control is mainly based on the ACPI system states, such as the S1 state. In the S0 state, in which the computer system is normally operated, the PLL is always free-running and is not controlled. In other words, power consumption is not controlled and efficiently reduced when the computer system is in normal operation.
Generally, computer systems will not automatically enter sleeping states S1-S5 frequently and the OS will frequently issue commands to configure the processor power state to enter the power saving state C3/C4. Thus, the processor stays in the C3 or C4 state much longer than the computer system in the S1 or other sleeping states.
It is therefore desirable to have a more efficient PLL control method and apparatus for a processor configured in the power saving state (C3/C4 state).